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    Daidaitaccen Matsayin Ma'ana gama gari

    Lokacin aikawa: Nuwamba-27-2023

    Wannan labarin yafi gabatar da daidaitattun matakan dabaru, kamar CMOS, LVCMOS, TTL, LVTTL, LVDS, PECL / LVPECL, CML, VML, HSTL, SSTL, da sauransu.

    haske (1)
    haske (4)
    haske (2)

    LVPECL:

    haske (5)

    Mafi girman ƙima: LVPECL shine 10 + Gbps

    CML:

    haske (6)

    Matsakaicin ƙimar: 10 + Gbps

    Yanayin haɗin kai: Ana amfani da haɗin gwiwar DC tsakanin CML da CML lokacin da VCC iri ɗaya ce, kuma ana amfani da haɗakar AC tsakanin CML da CML lokacin da VCC ta bambanta.

    haske (7)

    Babban darajar SSTL

    Ma'auni na musamman don ƙwaƙwalwar ajiyar sauri (musamman SDRAM), wanda ke aiki har zuwa 200 MHz, kuma SSTL galibi ana amfani dashi a cikin ƙwaƙwalwar DDR. Kuma daidai yake da HSTL. V¬¬CCIO=2.5V, Shigar shine tsarin kwatantawa tare da matakin tunani na 1.25V a ƙarshen ɗaya da siginar shigarwa a ɗayan ƙarshen. Abubuwan buƙatun matakin tunani suna da girma (daidaituwa 1%), HSTL da SSTL galibi ana amfani da su ƙasa da 300M.

    Abin da ke sama shine gabatarwar matakan matakan dabaru na gama gari wanda Shenzhen HDV Phoelectron Technology Co., LTD ya kawo. Jerin kayan aikin mu masu alaƙa sun haɗa da: SFP na gani na gani, SFF na gani na gani, module na gani na sadarwa, 1x9 na gani na gani, kayan aikin sadarwa na gani, dual fiber bidirectional Optical module da sauransu. Idan kuna da ƙarin nau'ikan buƙatun ƙirar, da fatan za a ƙara tuntuɓar.



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